ATSAMC21G17A-MZTVAO microchip
Available
ATSAMC21G17A-MZTVAO microchip
Operating Conditions • 2.7V – 5.5V, -40°C to +125°C, DC to 48 MHz Core • ARM® Cortex®-M0+ CPU running at up to 48 MHz – Single-cycle hardware multiplier – Micro Trace Buffer – Memory Protection Unit (MPU) Memories • 32/64/128/256 KB in-system self-programmable Flash • 1/2/4/8 KB independent self-programmable Flash for EEPROM emulation • 4/8/16/32 KB SRAM Main Memory System • Power-on Reset (POR) and Brown-out Detection (BOD) • Internal and external clock options with 48 MHz to 96 MHz Fractional Digital Phase Locked Loop (FDPLL96M) • External Interrupt Controller (EIC) (Interrupt pin debouncing is only available in SAM C21N) • 16 external interrupts – Hardware debouncing (only on the 100Pin TQFP) • One non-maskable interrupt • Two-pin Serial Wire Debug (SWD) programming, test, and debugging interface Low-Power • Idle and Standby Sleep modes • SleepWalking peripherals Peripherals • Hardware Divide and Square Root Accelerator (DIVAS) • 12-channel Direct Memory Access Controller (DMAC) • 12-channel Event System • Up to eight 16-bit Timer/Counters (TC), configurable as either (see Note): Note: Maximum and minimum capture is only available in SAM C21N devices. – One 16-bit TC with compare/capture channels – One 8-bit TC with compare/capture channels
– One 32-bit TC with compare/capture channels, by using two TCs • Two 24-bit Timer/Counters and one 16-bit Timer/Counter for Control (TCC), with extended functions: – Up to four compare channels with optional complementary output – Generation of synchronized pulse width modulation (PWM) pattern across port pins – Deterministic fault protection, fast decay and configurable dead-time between complementary output – Dithering that increase resolution with up to 5 bit and reduce quantization error • Frequency Meter (The division reference clock is only available in the SAM C21N) • 32-bit Real Time Counter (RTC) with clock/calendar function • Watchdog Timer (WDT) • CRC-32 generator • Up to two Controller Area Network (CAN) interfaces: – CAN 2.0A/B and CAN-FD (ISO 11898-1:2015) • Each CAN interface have two selectable pin locations to switch between two external CAN transceivers (without the need for an external switch) • Up to eight Serial Communication Interfaces (SERCOM), each configurable to operate as either: – USART with full-duplex and single-wire half-duplex configuration – I2C up to 3.4 MHz (Except SERCOM6 and SERCOM7) – SPI – LIN master/slave – RS-485 – PMBus • One Configurable Custom Logic (CCL) • Up to Two 12-bit, 1 Msps Analog-to-Digital Converter (ADC) with up to 12 channels each (20 unique channels) – Differential and single-ended input – Automatic offset and gain error compensation – Oversampling and decimation in hardware to support 13-, 14-, 15- or 16-bit resolution • One 16-bit Sigma-Delta Analog-to-Digital Converter (SDADC) with up to 3 differential channels • 10-bit, 350 ksps Digital-to-Analog Converter (DAC) • Up to four Analog Comparators (AC) with Window Compare function • Integrated Temperature Sensor • Peripheral Touch Controller (PTC) – 256-Channel capacitive touch and proximity sensing I/O • Up to 84 programmable I/O pins Qualification • AEC-Q100 Grade 1 (-40°C to 125°C) Packages • 100-pin TQFP • 64-pin TQFP, VQFN • 56-pin WLCSP
• 48-pin TQFP, VQFN • 32-pin TQFP, VQFN General • Drop in compatible with SAM D20 and SAM D21 (see Note)
Operating Conditions • 2.7V – 5.5V, -40°C to +125°C, DC to 48 MHz Core • ARM® Cortex®-M0+ CPU running at up to 48 MHz – Single-cycle hardware multiplier – Micro Trace Buffer – Memory Protection Unit (MPU) Memories • 32/64/128/256 KB in-system self-programmable Flash • 1/2/4/8 KB independent self-programmable Flash for EEPROM emulation • 4/8/16/32 KB SRAM Main Memory System • Power-on Reset (POR) and Brown-out Detection (BOD) • Internal and external clock options with 48 MHz to 96 MHz Fractional Digital Phase Locked Loop (FDPLL96M) • External Interrupt Controller (EIC) (Interrupt pin debouncing is only available in SAM C21N) • 16 external interrupts – Hardware debouncing (only on the 100Pin TQFP) • One non-maskable interrupt • Two-pin Serial Wire Debug (SWD) programming, test, and debugging interface Low-Power • Idle and Standby Sleep modes • SleepWalking peripherals Peripherals • Hardware Divide and Square Root Accelerator (DIVAS) • 12-channel Direct Memory Access Controller (DMAC) • 12-channel Event System • Up to eight 16-bit Timer/Counters (TC), configurable as either (see Note): Note: Maximum and minimum capture is only available in SAM C21N devices. – One 16-bit TC with compare/capture channels – One 8-bit TC with compare/capture channels
– One 32-bit TC with compare/capture channels, by using two TCs • Two 24-bit Timer/Counters and one 16-bit Timer/Counter for Control (TCC), with extended functions: – Up to four compare channels with optional complementary output – Generation of synchronized pulse width modulation (PWM) pattern across port pins – Deterministic fault protection, fast decay and configurable dead-time between complementary output – Dithering that increase resolution with up to 5 bit and reduce quantization error • Frequency Meter (The division reference clock is only available in the SAM C21N) • 32-bit Real Time Counter (RTC) with clock/calendar function • Watchdog Timer (WDT) • CRC-32 generator • Up to two Controller Area Network (CAN) interfaces: – CAN 2.0A/B and CAN-FD (ISO 11898-1:2015) • Each CAN interface have two selectable pin locations to switch between two external CAN transceivers (without the need for an external switch) • Up to eight Serial Communication Interfaces (SERCOM), each configurable to operate as either: – USART with full-duplex and single-wire half-duplex configuration – I2C up to 3.4 MHz (Except SERCOM6 and SERCOM7) – SPI – LIN master/slave – RS-485 – PMBus • One Configurable Custom Logic (CCL) • Up to Two 12-bit, 1 Msps Analog-to-Digital Converter (ADC) with up to 12 channels each (20 unique channels) – Differential and single-ended input – Automatic offset and gain error compensation – Oversampling and decimation in hardware to support 13-, 14-, 15- or 16-bit resolution • One 16-bit Sigma-Delta Analog-to-Digital Converter (SDADC) with up to 3 differential channels • 10-bit, 350 ksps Digital-to-Analog Converter (DAC) • Up to four Analog Comparators (AC) with Window Compare function • Integrated Temperature Sensor • Peripheral Touch Controller (PTC) – 256-Channel capacitive touch and proximity sensing I/O • Up to 84 programmable I/O pins Qualification • AEC-Q100 Grade 1 (-40°C to 125°C) Packages • 100-pin TQFP • 64-pin TQFP, VQFN • 56-pin WLCSP
• 48-pin TQFP, VQFN • 32-pin TQFP, VQFN General • Drop in compatible with SAM D20 and SAM D21 (see Note)
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